摘要 |
<P>PROBLEM TO BE SOLVED: To reduce memory cell size of spin transfer torque magnetoresistive random access memory (STT-MRAM). <P>SOLUTION: A reduced bit cell size is achieved by arranging source lines SL substantially in parallel with word lines WL and substantially perpendicular to bit lines BL. Further, in one embodiment, during a write operation, a high logic/voltage level is applied to the bit lines of unselected bit cells to prevent an invalid write operation. <P>COPYRIGHT: (C)2013,JPO&INPIT |