TAMPER-RESISTANT NON-VOLATILE MEMORY DEVICE AND INTEGRATED CIRCUIT CARD

摘要

A non-volatile memory device according to an aspect of the present disclosure includes a memory array that includes non-volatile memory cells; a read circuit that, in operation, selects, from the memory array, non-volatile memory cells corresponding to one of resistance value ranges, and obtains pieces of resistance value information about resistance values of the selected non-volatile memory cells; a computation circuit that, in operation, calculates a binarization reference value by using the pieces of resistance value information; and an identification information generation circuit that, in operation, generates individual identification information. The read circuit, in operation, obtains first digital data in accordance with relationships between each of the pieces of resistance value information and the binarization reference value. The identification information generation circuit, in operation, obtains second digital data uncorrelated with the resistance values, and generates the individual identification information by using the first digital data and the second digital data.

主权项

1. A non-volatile memory device comprising:
a memory array that includes non-volatile memory cells; a read circuit that, in operation, selects, from among the non-volatile memory cells, non-volatile memory cells corresponding to one resistance value range among resistance value ranges distinguished from each other by at least one threshold, and obtains pieces of resistance value information about resistance values of the selected non-volatile memory cells corresponding to the one resistance value range; a computation circuit that, in operation, calculates a binarization reference value by using the pieces of resistance value information obtained by the read circuit; and an identification information generation circuit that, in operation, generates individual identification information, wherein, in operation, the read circuit obtains first digital data in accordance with relationships between each of the pieces of resistance value information and the binarization reference value, and the identification information generation circuit obtains second digital data that is different from the first digital data and that does not correlate with the resistance values, and generates the individual identification information by using the first digital data and the second digital data.