发明名称 DIGITAL SIGNAL PROCESSING UNIT
摘要 PROBLEM TO BE SOLVED: To realize display of high definition graphic or characters or the like without the need for a memory with a large capacity by using a memory for a video signal and a memory for pattern information in common so as to implement the processing. SOLUTION: A memory 37 accesses an address generating circuit 36, other input terminal of a selection circuit 32 and a pattern information generating circuit 38. A video signal S14 outputted from a video signal control circuit 34 is written in the memory 37 based on a write address WAD generated by the address generating circuit 36. On the other hand, the pattern information generating circuit 38 outputs pattern information to an input port of the memory 37 at the outside of a valid video period of a video signal S12 based on a timing signal S15 outputted from a timing generating circuit 35. A signal identification circuit 33 identifies a signal to be a video signal when the signal is in existence in the valid video period and to be pattern information when the signal is in existence at the outside of the valid video period.
申请公布号 JPH09284650(A) 申请公布日期 1997.10.31
申请号 JP19960092514 申请日期 1996.04.15
申请人 TOSHIBA CORP 发明人 MATSUGAMI HISAKI;MIYAZAKI TORU
分类号 H04N5/278;G09G5/14;G09G5/395;H04N9/64 主分类号 H04N5/278
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