| 摘要 |
<P>PROBLEM TO BE SOLVED: To suppress an idle path control in a lock-in step in which capability that the malfunction of a control will occur is high when power saving is attained by validating the idle path intermittently by the charge pump circuit of a PLL (Phase Locked Loop). <P>SOLUTION: The control of the idle path is performed only when the PLL is locked and the output i of a lock detector 8 is positive logic. Pulse width control circuits 11, 12 are respectively added to counters 9, 10 each for frequency dividing a reference oscillator 1 and a variable frequency oscillator 2. And, the pulse widths of a raster signal c and a local signal d are set to the lengths sufficient to start the current source of a charge pump. An idle path validating signal h is made by taking the OR of these two signals and the inverted output of the lock detector 8. <P>COPYRIGHT: (C)2006,JPO&NCIPI |
