发明名称 ADDRESS DECODER WITH MEMORY ALLOCATION FOR A MICRO-CONTROLLER SYSTEM
摘要 The micro-controller system is comprised of a programmable microprocessor, a plurality of memory units having a plurality of addressable memory registers. The memory units are in bus communication with the programmable microprocessor and a application specific integrated circuit. The application specific integrated circuit includes a circuit for dividing the memory units into a plurality of addressable regions in response to programming of the programmable microprocessor. The microprocessor is programmed such that the initial address for each of the regions is assigned by the most significant addressable bits, and the upper most address for the region being programmable defined by upper most address for the region. The circuit includes an address registers. The microprocessor can address each of the memory register and writing a respective upper most address in the respective one of the registers, the respective address corresponding upper most addressable registers of the respective addressable regions of the memory means.
申请公布号 CA2137508(A1) 申请公布日期 1995.06.10
申请号 CA19942137508 申请日期 1994.12.07
申请人 PITNEY BOWES INC. 发明人 LEE, YOUNG W.;MOH, SUNGWON;MULLER, ARNO
分类号 G06F12/06;G07B17/00;(IPC1-7):G06F13/16 主分类号 G06F12/06
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