Dynamic load balancing switch architecture

摘要

A forwarding system includes a first processor coupled to connecting devices using a plurality of uplinks, and a second processor coupled to the connecting devices using a plurality of downlinks. The first processor includes, in a memory, one or more queues each corresponding to the second processor, a priority, and/or to a packet cast type (e.g., unicast or multicast). The first processor is configured to select a particular queue, select a particular uplink based on a comparison of measurements corresponding to respective loads of the plurality of uplinks, and cause a fragment or the entirety of a packet in the particular queue to be forwarded to the second processing device using the selected uplink and corresponding connecting device. The second processor is configured to reassemble the packet, reorder the packet into a flow, and forward the packet from the forwarding system.

主权项

1. A load balancing modular forwarding apparatus, comprising:
a first processing device coupled to a plurality of uplinks; a plurality of buffers corresponding to the plurality of uplinks; a second processing device coupled to a plurality of downlinks; a plurality of connecting devices, wherein each of the plurality of connecting devices is coupled to a respective one of the first plurality of uplinks and a respective one of the plurality of downlinks; and a queue allocated in a memory accessible by the first processing device, the queue for storing data packets, or indicators of data packets, that are to be forwarded to the second processing device; wherein the first processing device is configured to:
select a particular buffer from the plurality of buffers based on a comparison of respective measurements corresponding to respective loads of respective uplinks of the plurality of uplinks, andcause at least a portion of a data packet in the queue to be stored in the particular buffer, so that the at least the portion of the data packet is forwarded from the first processing device to the second processing device using an uplink corresponding to the particular buffer and a corresponding connecting device.