发明名称 METHOD AND CIRCUIT FOR OFFSET COMPENSATION
摘要 PURPOSE:Not to cause vibration of an output signal even if the signal period is odd number of times as high as the sampling period, by detecting a periodical signal of odd number of times as high as the sampling period of the signal, and stopping the offset compensating action. CONSTITUTION:The offset compensation signal generating circuit 21 generates the offset compensation voltage added to the input signal so that the number of 1, 0 of the polarity bit MSB of the output code of the AC converter 12 becomes equal. When the period of the input signal is odd number of times as high as the sampling period, number of positive and negative samplings does not become equal, and also the output signal vibrates depending greatly on frequency of the signal, amplitude and phase of the sampling clock, as to the offset voltage, and therefore, a period which does not require the offset compensation voltage from MSB is detected by the signal detection circuit 22, and a signal T2 for controlling the circuit 21 is generated. When the period of the input signal is odd number of times as high as the sampling period by the signal T2, it is eliminated from the object of offset compensation. In this way, even if the period of the signal is odd number of times as high as the sampling period, the output signal does not cause vibration.
申请公布号 JPS5685931(A) 申请公布日期 1981.07.13
申请号 JP19790162517 申请日期 1979.12.14
申请人 FUJITSU LTD 发明人 NAKAJIYOU TAKAFUMI;OOHATA MICHINOBU;YAMAZAWA MASAO;TAKAHASHI MASAYUKI;MATSUMURA TOSHIHIKO
分类号 H03M1/10;H03M1/00 主分类号 H03M1/10
代理机构 代理人
主权项
地址