发明名称 |
Clock control circuits, systems and methods |
摘要 |
A microprocessor device (102) includes a central processing unit (702) having a clock input, a clock generator (OSC, PLL) of clock pulses, a logic circuit (708) having an output to supply a clock control signal (SUSP), and a clock gate (3610) fed by the clock pulses and having a clock gate output (CPU-CLK) coupled to the clock input of the central processing unit. The clock gate (3610) responds to the clock control signal (SUSP) to prevent said clock pulses (CPU-CLK) from reaching the central processing unit within one clock cycle of a change in said clock control signal. Other devices, systems and methods are also disclosed.
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申请公布号 |
US5710911(A) |
申请公布日期 |
1998.01.20 |
申请号 |
US19950484096 |
申请日期 |
1995.06.07 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
WALSH, JAMES J.;JOE, JOSEPH;CHEN, IAN;TAKAHASHI, YUTAKA |
分类号 |
G06F1/26;G06F1/04;G06F1/06;G06F1/10;G06F1/16;G06F1/32;G06F3/00;G06F9/30;(IPC1-7):G06F1/04;G06F1/08 |
主分类号 |
G06F1/26 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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