发明名称 A/D CONVERTER
摘要 PROBLEM TO BE SOLVED: To increase the number of bits in a digital signal, without increasing the number of comparators and to reduce power consumption as well by interpolating an intermediate voltage by comparing the voltages comparators connected in parallel with each other. SOLUTION: During the 1st comparison period for low-order bits, first, control signalΦ2 andΦ3 are turned into high level and switches SW12 and SW13 of a low-order comparator 18b are turned on. Thus, in place of a sampled analog signal VIN, a low-order reference voltage vrf1 is impressed on one terminal of capacitors C11 and C12, and the analog signal VIN is compared with the low-order reference voltage vrf1. Next, during the 2nd comparison term of low-order bits, the control signalΦ3 is turned into low level the control signalΦ4 is turned into high level after an SW14 has been turned off, and an SW15 is turned on. Thus, the intermediate voltage between 1st and 2nd reference voltages can be accurately interpolated.
申请公布号 JPH1041820(A) 申请公布日期 1998.02.13
申请号 JP19960193188 申请日期 1996.07.23
申请人 KAWASAKI STEEL CORP 发明人 OGASAWARA HIROSHI
分类号 H03M1/14;H03M1/36;(IPC1-7):H03M1/14 主分类号 H03M1/14
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