ANCHORED INTERCONNECT

摘要

An embodiment includes a semiconductor structure comprising: a backend portion including a plurality of metal layers between bottom and top metal layers; the top metal layer including a top metal layer portion having first and second opposing sidewall surfaces and a top surface that couples the sidewall surfaces to one another; an insulator layer directly contacting the top surface; and a via coupling a contact bump to the top metal layer portion; wherein a first vertical axis, orthogonal to a substrate coupled to the backend portion, intercepts the contact bump, the nitride layer, the via, and the top metal layer portion. Other embodiments are described herein.

主权项

1. A semiconductor structure comprising:
a frontend portion including a device layer on a substrate; a backend portion including a bottom metal layer, a top metal layer, and a plurality of metal layers between the bottom and top metal layers; the top metal layer including a top metal layer portion having first and second opposing sidewall surfaces and a top surface that couples the sidewall surfaces to one another; a nitride layer directly contacting the top surface directly adjacent the first sidewall surface at a first location and directly contacting the top surface directly adjacent the second sidewall surface at a second location; and a contact bump and a via coupling the contact bump to the top metal layer portion; wherein (a) the backend portion includes no metal layer between the bottom metal layer and a top of the frontend portion; (b) the backend portion includes no metal layer between the top metal layer and the top of the backend portion; and (c) the via directly contacts the top metal layer portion directly beneath the nitride layer at both of the first and second locations.