发明名称 Capacitive Coupling of Integrated Circuit Die Components
摘要 Capacitive coupling of integrated circuit die components and other conductive areas is provided. Each component to be coupled has a surface that includes at least one conductive area, such as a metal pad or plate. An ultrathin layer of dielectric is formed on at least one surface to be coupled. When the two components, e.g., one from each die, are permanently contacted together, the ultrathin layer of dielectric remains between the two surfaces, forming a capacitor or capacitive interface between the conductive areas of each respective component. The ultrathin layer of dielectric may be composed of multiple layers of various dielectrics, but in one implementation, the overall thickness is less than approximately 50 nanometers. The capacitance per unit area of the capacitive interface formed depends on the particular dielectric constants K of the dielectric materials employed in the ultrathin layer and their respective thicknesses. Electrical and grounding connections can be made at the edge of the coupled stack.
申请公布号 US2017092620(A1) 申请公布日期 2017.03.30
申请号 US201615247705 申请日期 2016.08.25
申请人 Invensas Corporation 发明人 Haba Belgacem;Sitaram Arkalgud R.
分类号 H01L25/065;H01L23/00;H01L21/311;H01L25/00;H01L21/02 主分类号 H01L25/065
代理机构 代理人
主权项 1. A method of coupling microelectronic components, comprising: selecting integrated circuit dies, each integrated circuit die including a surface comprising at least one conductive area; forming an ultrathin layer of a dielectric on at least one of the surfaces of at least one of the integrated circuit dies; and coupling the integrated circuit dies in a stack forming a capacitive interface comprising the ultrathin layer of the dielectric and respective conductive areas of the two integrated circuit dies on opposing sides of the ultrathin layer of the dielectric.
地址 San Jose CA US