Method of fabricating a semiconductor device including high-K metal gate having reduced threshold voltage variation

摘要

A semiconductor device having a reduced variation in threshold voltage includes a semiconductor substrate with a high dielectric-constant (high-k) layer deposited in a gate trench and on a semiconductor portion of the substrate. At least one workfunction layer has an arrangement of first and second workfunction granular portions on an upper surface of the high-k layer to define a workfunction of the semiconductor device. The arrangement of first and second workfunction granular portions define a granularity of the at least one workfunction layer. A gate contact material fills the gate trench, wherein the high-k layer has a concentration of oxygen vacancies based on the granularity of the at least one work function metal layer so as to reduce the variation in the threshold voltage.

主权项

1. A method of fabricating a semiconductor device, comprising:
forming at least one gate trench in a semiconductor substrate, the gate trench exposing a semiconductor portion of the substrate; forming a high dielectric-constant (high-k) layer in the at least one gate trench and on the semiconductor portion; forming at least one workfunction layer having an arrangement of first and second workfunction granular portions on an upper surface of the high-k layer to define a workfunction of the semiconductor device, the arrangement of first and second workfunction granular portions defining a granularity of the at least one workfunction layer; and performing a thermal anneal process that controls a concentration of oxygen vacancies in the high-k layer based on the granularity of the at least one work function metal layer so as to reduce a variation in the threshold voltage.