发明名称 Split Gate Non-volatile Memory Cell Having A Floating Gate, Word Line, Erase Gate, And Method Of Manufacturing
摘要 A memory device including a silicon semiconductor substrate, spaced apart source and drain regions formed in the substrate with a channel region there between, and a conductive floating gate disposed over a first portion of the channel region and a first portion of the source region. An erase gate includes a first portion that is laterally adjacent to the floating gate and over the source region, and a second portion that extends up and over the floating gate. A conductive word line gate is disposed over a second portion of the channel region. The word line gate is disposed laterally adjacent to the floating gate and includes no portion disposed over the floating gate. The thickness of insulation separating the word line gate from the second portion of the channel region is less than that of insulation separating the floating gate from the erase gate.
申请公布号 US2017012049(A1) 申请公布日期 2017.01.12
申请号 US201615182527 申请日期 2016.06.14
申请人 Silicon Storage Technology, Inc. 发明人 Yang Jeng-Wei;Wu Man-Tang;Chen Chun-Ming;Tadayoni Mandana;Su Chien-Sheng;Do Nhan
分类号 H01L27/115;G11C16/26;H01L29/788;H01L29/66;H01L29/423;H01L21/28 主分类号 H01L27/115
代理机构 代理人
主权项 1. A memory device, comprising: a silicon semiconductor substrate; spaced apart source and drain regions formed in the silicon semiconductor substrate with a channel region there between; a conductive floating gate disposed over and insulated from a first portion of the channel region and a first portion of the source region; a conductive erase gate that includes: a first portion that is laterally adjacent to and insulated from the floating gate, and is over and insulated from the source region, anda second portion that extends up and over, and is insulated from, the floating gate; a conductive word line gate disposed over and insulated from a second portion of the channel region, wherein the word line gate is disposed laterally adjacent to the floating gate and includes no portion disposed over the floating gate; wherein a thickness of insulation separating the word line gate from the second portion of the channel region is less than a thickness of insulation separating the floating gate from the erase gate.
地址 San Jose CA US