| 摘要 |
An i-type AlInAs avalanche multiplication layer is grown on an n-type InP substrate. A p-type AlInAs electric field reduction layer is grown on the i-type AlInAs avalanche multiplication layer. Transition layers are grown to cover the top surface of the electric field reduction layer. After the covering of the top surface of the electric field reduction layer by the transition layers, the temperature of the growth process is increased and an n−-type InGaAs light absorption layer is grown on the transition layer at a temperature higher than the growth temperature of the electric field reduction layer. The growth temperature of the transition layers is lower than that of the n−-type InGaAs light absorption layer. The transition layers have higher resistance to surface defects than the electric field reduction layer at temperatures higher than the growth temperature of the electric field reduction layer. |
