| 主权项 |
1. An apparatus for receiving signals associated with one or more wireless communication protocols, the apparatus comprising:
single carrier receiver circuitry for demodulating a received single carrier signal, the single carrier receiver circuitry including,
a first digital interpolator comprising a linear interpolator operating at a first clock sampling frequency, wherein the first digital interpolator has an input data rate at the first clock sampling frequency and an output data rate at a second clock sampling frequency,a decoding core for decoding the received single carrier signal using a third clock sampling frequency that is an integer multiple of the second clock sampling frequency,a numerically controlled oscillator configured to adjust the interpolation phase of the first digital interpolator, anda clock generation control module configured to receive a clock signal to generate the second a the third clock sampling frequencies based on a control signal; multi-carrier receiver circuitry for demodulating a received multi-carrier signal, the multi-carrier receiver circuitry including a second digital interpolator, wherein symbol timing recovery is executed in the apparatus by adjusting an interpolation phase of the first digital interpolator or the second digital interpolator; and a clock coupled to the single carrier receiver circuitry and coupled to the multi-carrier receiver circuitry, the clock being configured to supply the clock signal that is processed to generate a plurality of clock sampling frequencies for demodulating the received single carrier signal and the received multi-carrier signal. |
