发明名称 |
Bipolar transistor |
摘要 |
P-type second semiconductor layers each interposed between a corresponding pair of n-type first semiconductor layers reduce the apparent doping concentration in the entire collector layer without reducing the doping concentrations in the first semiconductor layers. This improves the linearity of capacitance characteristics and enables sufficient mass productivity to be achieved. Interposing each of the second semiconductor layers between the corresponding pair of the first semiconductor layers reduce the average carrier concentration over the entire collector layer, which allows a wide depletion layer to be formed inside the collector layer and, as a result, reduces base-collector capacitance. |
申请公布号 |
US9331187(B2) |
申请公布日期 |
2016.05.03 |
申请号 |
US201514821214 |
申请日期 |
2015.08.07 |
申请人 |
Murata Manufacturing Co., Ltd. |
发明人 |
Umemoto Yasunari;Kurokawa Atsushi;Saimei Tsunekazu |
分类号 |
H01L29/732;H01L31/072;H01L21/331;H01L29/737;H01L29/08;H01L29/15;H01L29/20 |
主分类号 |
H01L29/732 |
代理机构 |
Studebaker & Brackett PC |
代理人 |
Studebaker & Brackett PC |
主权项 |
1. A bipolar transistor comprising:
a sub-collector layer having a first conductivity type; a collector layer stacked on the sub-collector layer; a base layer stacked on the collector layer, the base layer having a second conductivity type opposite to the first conductivity type; and an emitter layer stacked on the base layer, the emitter layer having the first conductivity type, wherein the collector layer includes
a plurality of first semiconductor layers having the first conductivity type, anda plurality of second semiconductor layers having the second conductivity type, each layer of the plurality of second semiconductor layers being interposed between a corresponding pair of the plurality of first semiconductor layers. |
地址 |
Kyoto-fu JP |