Methods and systems for reducing order-dependent mismatch errors in time-interleaved analog-to-digital converters

摘要

A time-interleaved analog-to-digital converter (ADC) uses M sub-analog-to-digital converters (sub-ADCs) to, according to a sequence, sample an analog input signal to produce digital outputs. When the M sub-ADCs are interleaved, the digital outputs exhibit mismatch errors between the M sub-ADCs due to mismatches between the sub-ADCs. A more second order subtle effect is that the mismatch error for a particular digital output from a particular ADC, due to internal coupling or other such interaction and effects between the M sub-ADCs, can vary depending on which sub-ADC(s) were used before and/or after the particular sub-ADC. If M sub-ADCs are time-interleaved randomly, the mismatches between the M sub-ADCs become a function of the sub-ADC selection pattern in the sequence. The present disclosure describes mechanisms for measuring and reducing these order-dependent mismatches to achieve high dynamic range performance in the time-interleaved ADC.

主权项

1. A method for reducing order-dependent errors of a time-interleaved analog-to-digital converter comprising a plurality of analog-to-digital converters (ADCs) able to, according to a sequence, sample an analog input signal and produce digital outputs, the method comprising:
determining a first order information associated with a first digital output from a first ADC of the plurality of ADCs; determining a first error coefficient associated with the first digital output based on the first order information; and calibrating the time-interleaved analog-to-digital converter using the first error coefficient.