发明名称 Hardware enforced memory access permissions
摘要 Embodiments of apparatuses and methods for hardware enforced memory access permissions are disclosed. In one embodiment, a processor includes address translation hardware and memory access hardware. The address translation hardware is to support translation of a first address, used by software to access a memory, to a second address, used by the processor to access the memory. The memory access hardware is to detect an access permission violation.
申请公布号 US9286245(B2) 申请公布日期 2016.03.15
申请号 US201113995360 申请日期 2011.12.30
申请人 Intel Corporation 发明人 Durham David M.;Sahita Ravi L.;Dewan Prashant
分类号 G06F21/00;G06F12/14;G06F21/50;G06F21/12;G06F21/79 主分类号 G06F21/00
代理机构 代理人 Lane Thomas R.
主权项 1. A processor comprising: page walk hardware to traverse a hierarchy of page tables to perform an address translation of an actual linear address to a physical address, wherein the actual linear address is used by software to access a memory and the physical address is used by the processor to access the memory; a translation lookaside buffer to store a plurality of address translations performed by the page walk hardware; and memory access control hardware to look up, in a permissions map separate from the hierarchy of page tables, the physical address from the page walk hardware to find access permissions and an expected linear address, compare the expected linear address to the actual linear address, and store the address translation and the access permissions in the translation lookaside buffer only if the expected linear address matches the actual linear address.
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