发明名称 |
DISPLAY APPARATUS |
摘要 |
A display apparatus includes: a timing control block which outputs image data based on external image data and control signals, and generates data and gate-side control signals based on the external control signal; a source drive block which converts the image data into a data voltage based on the data control signal; a low frequency detection block which detects a low power drive period based on the external control signal and generates a power control signal, a state of which is determined based on a result of the detection; an integrated chip which receives first and second drive voltages and includes a first switch block that turns off a circuit of the source drive block based on the power control signal during the low power drive period; a gate drive circuit which generates a gate signal based on a gate control signal from the integrated chip; and a display panel. |
申请公布号 |
US2016063962(A1) |
申请公布日期 |
2016.03.03 |
申请号 |
US201514755241 |
申请日期 |
2015.06.30 |
申请人 |
Samsung Display Co., LTD. |
发明人 |
PARK Suhyeong;LEE Kyoungwon;JUNG Hoyong;PARK Cheolwoo;YOU Bonghyun |
分类号 |
G09G5/18 |
主分类号 |
G09G5/18 |
代理机构 |
|
代理人 |
|
主权项 |
1. A display apparatus comprising:
a timing control block which outputs image data based on external image data in response to external control signals, and generates a data control signal and a gate-side control signal based on the external control signal; a source drive block which converts the image data into a data voltage in response to the data control signal; a low frequency detection block which receives the external control signal, detects a low power drive period based on the external control signal and generates a power control signal, a state of which is determined based on a result of the detection of the low power drive period; an integrated chip which receives first and second drive voltages, wherein the integrated chip includes a first switch block which turns off a circuit of the source drive block in response to the power control signal from the low frequency detection block during the low power drive period; a gate drive circuit which generates a gate signal in response to a gate control signal from the integrated chip; and a display panel which receives the gate signal and the data voltage and displays an image. |
地址 |
Yongin-City KR |