ARRAY SUBSTRATE, METHOD OF MANUFACTURING THE SAME AND DISPLAY DEVICE

摘要

The present invention discloses an array substrate, a method of manufacturing the array substrate and a display device. Since the respective surfaces of the sources, the drains and the data lines are clad by the respective insulating films, in formation of the patterns of the pixel electrodes above the insulating films by using a patterning process, the insulating films can prevent the sources and the data lines provided under them from being corroded by an etching agent when an etching process is performed to form the patterns of the pixel electrodes, so as to avoid an influence on display quality of a display panel. Furthermore, since the insulating films are formed by curing the insulating material, instead of the photoresist, remained on the patterns of the sources, the drains and the data lines when forming the patterns of the sources, the drains and the data lines by using the insulating material (replacing the photoresist), formation of the insulating films will not increase the number of masks, and a step of peeling off the insulating material is omitted. Furthermore, the respective connecting portions electrically connects the respective drains with the respective pixel electrodes through the respective first via holes A located above the respective drains and passing through the respective insulating films, so that a normal display function of the display panel can be ensured.

主权项

1. An array substrate, comprising:
a base substrate; sources, drains and data lines provided on the base substrate; pixel electrodes; connecting portions; and insulating films, the respective insulating films cladding the respective sources, the respective drains and the respective data lines; wherein each insulating film is provided thereon with a first via hole passing therethrough and located above the respective drain, and the respective connecting portions electrically connect the respective drains with the respective pixel electrodes through the respective first via holes.