ARRAY SUBSTRATE AND METHOD FOR FABRICATING THE SAME

摘要

An array substrate and a method for fabricating the same are disclosed. The method includes steps of providing a substrate (20), a first metal layer including patterns of gate electrodes (21, 24) of a first and second TFTs, an active layer (27) and a gate insulation layer (28) are formed on the substrate; forming an etch stop layer film and a photoresist sequentially on the substrate (20), and allowing the photoresist to form a first, second and third regions through gray-scale exposing and developing; forming a pattern of an etch stop layer (29), a connection via hole (30), and a contact via hole (31) respectively in the first, second and third regions through a patterning process; and forming source electrodes and drain electrodes (22, 23,25, 26) of the first and second TFTs. Photoresist of different thicknesses are disposed according to etch depths, thereby avoiding the over-etch of relatively shallow via holes.

主权项

1. A method for fabricating an array substrate, comprising:
providing a substrate, wherein a first metal layer, a gate insulation layer and an active layer are formed on the substrate, and the first metal layer comprises patterns of a gate electrode of a first TFT and a gate electrode of a second TFT; forming an etch stop layer film on the substrate; applying a photoresist to the etch stop layer film, gray-scale exposing and developing the photoresist to form a first region having a first thickness, a second region having a second thickness and a third region having a third thickness, wherein the first thickness, the second thickness and the third thickness are not equal to each other, and the first thickness is larger than the second and third thicknesses; forming, through a patterning process, a pattern of an etch stop layer in the first region, a connection via hole for connecting a drain electrode of the first TFT to the gate electrode of the second TFT in the second region, and a contact via hole for connecting respective source electrode and drain electrode of each of the first and second TFTs to the active layer in the third region; and forming a second metal layer film on the substrate done with the previous steps, forming a source electrode and a drain electrode of the first TFT, as well as a source electrode and a drain electrode of the second TFT through a patterning process, wherein the source electrode and the drain electrode of each of the first and second TFTs are respectively electrically connected to the active layer by way of the contact via hole, and the drain electrode of the first TFT is electrically connected to the gate electrode of the second TFT by way of the connection via hole.