Compressive strained III-V complementary metal oxide semiconductor (CMOS) device

摘要

A semiconductor device including a first lattice dimension III-V semiconductor layer present on a semiconductor substrate, and a second lattice dimension III-V semiconductor layer that present on the first lattice dimension III-V semiconductor layer, wherein the second lattice dimension III-V semiconductor layer has a greater lattice dimension than the first lattice dimension III-V semiconductor layer, and the second lattice dimension III-V semiconductor layer has a compressive strain present therein. A gate structure is present on a channel portion of the second lattice dimension III-V semiconductor layer, wherein the channel portion of second lattice dimension III-V semiconductor layer has the compressive strain. A source region and a drain region are present on opposing sides of the channel portion of the second lattice dimension III-V semiconductor layer.

主权项

1. A semiconductor device comprising:
a first lattice dimension III-V semiconductor layer present atop a semiconductor substrate, and a second lattice dimension III-V semiconductor layer present on the first lattice dimension III-V semiconductor layer, wherein the second lattice dimension III-V semiconductor layer has a greater lattice dimension than the first lattice dimension III-V semiconductor layer, and the second lattice dimension IIII-V semiconductor layer has a compressive strain present therein; a first gate structure for a p-type conductivity semiconductor device and comprising a gate dielectric having a bottommost surface present entirely on, and directly contacting, a surface of a first channel portion of the second lattice dimension III-V semiconductor layer, wherein the first channel portion of second lattice dimension III-V semiconductor layer has the compressive strain; and a second gate structure for an n-type conductivity semiconductor device is present on a second channel portion of the second lattice dimension III-V semiconductor layer.