发明名称 Logic analyzer
摘要 A logic analyzer (6, figure 1) is provided with a state controller 12 and analyzer circuitry. The logic analyzer switches between a programmable sequence of trigger states and generates an index signal within each trigger state. The index signal is used to control the analyzer circuitry to select appropriate portions of programmable trigger state data so as to configure the matching operation performed against hardware signal values taken from hardware circuitry 4 which is subject to analysis by the logic analyzer 6. Target control signal data may be used to control target signal values according to the index value of the trigger state. A plurality of logic analyzer may be provided on one integrated circuit.
申请公布号 GB2526850(A) 申请公布日期 2015.12.09
申请号 GB20140009965 申请日期 2014.06.05
申请人 ARM LIMITED 发明人 MARK GERALD LAVINE
分类号 G01R31/3177;G06F11/25 主分类号 G01R31/3177
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