发明名称 MULTI-MODULUS FREQUENCY DIVIDER
摘要 A frequency divider circuit can achieve multi-modulus operation. The frequency divider includes clocking transistor devices, memory transistor circuits, write transistor devices, and a current source bias. The clocking transistor devices receive a differential input signal having a first frequency at an input of the frequency divider. The memory transistor circuits store signals based on the differential input signal from the clocking transistor devices. The write transistor devices make a divided frequency signal available at an output terminal. The current source bias is coupled to the clocking transistor devices. The current source bias applies a bias current to adapt the frequency divider to a common-mode at the input of the frequency divider.
申请公布号 US2015349781(A1) 申请公布日期 2015.12.03
申请号 US201414288166 申请日期 2014.05.27
申请人 NXP B.V. 发明人 Torres Javier Mauricio Velandia
分类号 H03K21/02;H04B1/40;H03B5/12 主分类号 H03K21/02
代理机构 代理人
主权项 1. A frequency divider comprising: clocking transistor devices to receive a differential input signal having a first frequency at an input of the frequency divider; memory transistor circuits coupled to the clocking transistor devices to store signals based on the differential input signal from the clocking transistor devices; write transistor devices coupled to the memory transistor circuits to make a divided frequency signal available at an output terminal; and a current source bias coupled to the clocking transistor devices, wherein the current source bias is configured to apply a bias current to adapt the frequency divider to a common-mode at the input of the frequency divider.
地址 Eindhoven NL