| 主权项 |
1. A receiver having a plurality of reception circuits configured to receive data transmitted via a plurality of lanes in accordance with a transmission clock from a common transmission clock source, wherein
each of the plurality of reception circuits comprises:
a clock data recovery circuit configured to extract own clock information from received data;a clock information switch circuit configured to select either one of the own clock information of the reception circuit and another own clock information, which is the own clock information of an another one of the plurality of reception circuits;a phase shifter configured to generate an adjusted clock by performing phase adjustment of a reception clock from a common reception clock source in accordance with clock information selected by the clock information switch circuit; andan input circuit configured to take in data transmitted in accordance with the adjusted clock, and the clock information switch circuit selects the own clock information in a normal operation and selects the another own clock information in an eye-opening measurement operation, wherein: the phase shifter performs phase adjustment of the reception clock in accordance with information, which is a combination of the another clock information and phase offset information that changes in accordance with a position of sweep, at the time of the eye-opening measurement, each of the plurality of reception circuits receives the another own clock information from the reception circuit adjacent to one side and supplies the own clock information to the reception circuit adjacent to the other side as the another own clock information, and the reception circuit at one of ends of the plurality of reception circuits receives the another own clock information from the reception circuit at the other end, in a first mode of eye-opening measurement modes, the odd-numbered reception circuits of the plurality of reception circuits are brought into an eye-opening measurement state and the even-numbered reception circuits into a normal operation state, and the eye-opening measurements of the odd-numbered reception circuits are performed, and in a second mode of the eye-opening measurement modes, the even-numbered reception circuits of the plurality of reception circuits are brought into the eye-opening measurement state and the odd-numbered reception circuits into the normal operation state, and the eye-opening measurements of the even-numbered reception circuits are performed. |
