发明名称 |
Data processing device and data processing system with wide voltage range operation mode |
摘要 |
A data processing device, includes a central processing unit configured to operate in accordance with a program; a register capable of setting a first mode and a second mode; a non-volatile memory; a sequencer configured to control the non-volatile memory; and a first clock circuit for supplying a first clock to the central processing unit and the non-volatile memory, wherein the first mode is a mode in which the central processing unit is operated within a first range of an external supply voltage, wherein the second mode is a mode in which the central processing unit is operated within a second range of the external supply voltage, the second range includes the first range and a relatively low voltage lower than the lower limit voltage of the first range. |
申请公布号 |
US9170637(B2) |
申请公布日期 |
2015.10.27 |
申请号 |
US201514685349 |
申请日期 |
2015.04.13 |
申请人 |
Renesas Electronics Corporation |
发明人 |
Sakugawa Mamoru;Fujito Masamichi;Setogawa Jun;Takahashi Masaru;Yoshimura Shinsuke |
分类号 |
G06F1/32;G06F1/08 |
主分类号 |
G06F1/32 |
代理机构 |
McGinn IP Law Group, PLLC |
代理人 |
McGinn IP Law Group, PLLC |
主权项 |
1. A data processing device, comprising:
a central processing unit configured to operate in accordance with a program; a register capable of setting a first mode and a second mode; a non-volatile memory; a sequencer configured to control the non-volatile memory; and a first clock circuit for supplying a first clock to the central processing unit and the non-volatile memory, wherein the first mode is a mode in which the central processing unit is operated within a first range of an external supply voltage, wherein the second mode is a mode in which the central processing unit is operated within a second range of the external supply voltage, the second range includes the first range and a relatively low voltage lower than the lower limit voltage of the first range; wherein the sequencer controls program and erase operations of the non-volatile memory when the external supply voltage is within the first range in the first mode, wherein the sequencer controls the program and erase operations of the non-volatile memory when the external supply voltage is within the second range and is equal to or less than a first voltage lower than an upper limit voltage of the first range in the second mode, and wherein the sequencer controls no program and erase operations of the non-volatile memory when the external supply voltage is within the second range and is higher than the first voltage in the second mode. |
地址 |
Kawasaki-shi, Kanagawa JP |