发明名称 |
Regulating circuit and method for regulating rotary speed, data processing device, and program code |
摘要 |
A regulating circuit that regulates rotary speed of a pulse-width modulated fan includes a measuring device that determines a period duration (TIst) of a tacho signal (TACH) of the fan, a digital regulating register that acquires a regulation value to drive the fan on the basis of a determined period duration (TIst) and a desired value (Tsoll), a digital control register that adjusts a duty ratio to drive the fan, the digital control register has a smaller register width than the digital regulating register, and a controller that updates the digital control register by evaluating a predetermined number of more significant bits of the digital regulating register. |
申请公布号 |
US9160265(B2) |
申请公布日期 |
2015.10.13 |
申请号 |
US201113881505 |
申请日期 |
2011.10.20 |
申请人 |
Fujitsu Technology Solutions Intellectual Property GmbH |
发明人 |
Busch Peter |
分类号 |
H02P23/00;H02P3/00;H02P7/06;G06F1/20;H05K7/20 |
主分类号 |
H02P23/00 |
代理机构 |
DLA Piper LLP (US) |
代理人 |
DLA Piper LLP (US) |
主权项 |
1. A regulating circuit that regulates rotary speed of a pulse-width-modulated fan comprising:
a measuring device that determines a period duration (TIst) of a tacho signal (TACH) of the fan, a digital regulating register that acquires a regulation value to drive the fan on the basis of a determined period duration (TIst) and a desired value (Tsoll), a digital control register that adjusts a duty ratio to drive the fan, the digital control register having a smaller register width than the digital regulating register, and a controller that updates the digital control register by evaluating a predetermined number of highest level bits of the digital regulating register relative to lowest level bits of the digital regulating register, wherein the digital control register has a register width of m bits and the digital regulating register a has width of n bits, the controller updating the digital control register by shifting content of the digital regulating register by a bit width of n-m bits so that the highest level bits of the regulation value represent the bits of a digital value with a lower resolution of m bits. |
地址 |
DE |