STRUCTURE AND METHOD OF FORMING ENHANCED ARRAY DEVICE ISOLATION FOR IMPLANTED PLATE EDRAM

摘要

A memory device is provided including a semiconductor on insulator (SOI) substrate including a first semiconductor layer atop a buried dielectric layer, wherein the buried dielectric layer is overlying a second semiconductor layer. A capacitor is present in a trench, wherein the trench extends from an upper surface of the first semiconductor layer through the buried dielectric layer and extends into the second semiconductor layer. A protective oxide is present in a void that lies adjacent the first semiconductor layer, and a pass transistor is present atop the semiconductor on insulator substrate in electrical communication with the capacitor.

主权项

1. A memory device comprising:
a semiconductor on insulator (SOI) substrate including, from top to bottom, a first semiconductor layer, a buried dielectric layer, and a second semiconductor layer; wherein said first semiconductor layer has a recessed vertical edge relative to at least a vertical edge of said buried dielectric layer; a protective oxide positioned adjacent said recessed vertical edge of said first semiconductor layer, wherein said protective oxide is present only on one side of said trench; a capacitor present in a trench, wherein said trench extends from an upper surface of said SOI substrate through said buried dielectric layer and extends into said second semiconductor layer, and a pass transistor in electrical communication with said capacitor and on a portion of said first semiconductor layer that is present on another side of said trench that is opposite said one side of said trench containing said protective oxide.