发明名称 Low-power modulus divider stage
摘要 A modulus divider stage (MDS) includes first and second stages. The MDS receives a modulus divisor control signal S that determines whether the MDS stage operates in a divide-by-two mode or a divide-by-three mode. The MDS stage also receives a feedback modulus control signal from another MDS. When in the divide-by-two mode, the MDS divides by two regardless of the feedback modulus control signal. To conserve power, the first stage is unpowered when the MDS stage operates in the divide-by-two mode. When in the divide-by-three mode, the MDS stage either divides by two or by three depending on the feedback modulus control signal. To further reduce power consumption, the first stage is unpowered when the MDS stage is in the divide-by-three mode but is nonetheless performing a divide-by-two operation. A power-down transistor holds the output of the first stage at the proper logic level when the first stage is unpowered.
申请公布号 US7564276(B2) 申请公布日期 2009.07.21
申请号 US20060560973 申请日期 2006.11.17
申请人 QUALCOMM INCORPORATED 发明人 NARATHONG CHIEWCHARN;SU WENJUN
分类号 H03B19/00 主分类号 H03B19/00
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