PLD architecture for flexible placement of IP function blocks
摘要
In accordance with one aspect of the invention, a hole is formed within an LE array of a PLD by interrupting the LE array base signal routing architecture such that a hole is left for IP function block to be incorporated. An interface region is provided for interfacing the remaining LE array base signal routing architecture to the IP function block.
申请公布号
EP2259431(A1)
申请公布日期
2010.12.08
申请号
EP20100178253
申请日期
2002.04.10
申请人
ALTERA CORPORATION
发明人
LEE, ANDY L.;MCCLINTOCK, CAMERON;JOHNSON, BRIAN D.;CLIFF, RICHARD;REDDY, SRINIVAS;LANE, CHRIS;LEVENTIS, PAUL;BETZ, VAUGHN TIMOTHY;LEWIS, DAVID