发明名称 PROCESS METHODS FOR ADVANCED INTERCONNECT PATTERNING
摘要 Methods for achieving advanced patterning of an interconnect dielectric material layer are provided in which the dimension, i.e., width, of an opening that is formed into a metallic hard mask layer is shrunk prior to extending the opening into the interconnect dielectric material layer. The shrinking of the dimension of the opening that is formed into the metallic hard mask layer can be achieved in the present application by forming at least a metallic hard mask spacer portion on a sidewall surface of each patterned metallic hard mask layer. The aforementioned basic principle can be applied to forming a line opening, a via opening and/or a combined via and line opening within an interconnect dielectric material layer, wherein each of the openings (line, via and/or via and line) has a reduced dimension as compared to that obtainable utilizing conventional lithography.
申请公布号 US2015221549(A1) 申请公布日期 2015.08.06
申请号 US201414174089 申请日期 2014.02.06
申请人 International Business Machines Corporation 发明人 Ponoth Shom;Yang Chih-Chao
分类号 H01L21/768;H01L21/311;H01L21/033 主分类号 H01L21/768
代理机构 代理人
主权项 1. A method of forming an interconnect structure comprising: providing a structure including, from bottom to top, an interconnect dielectric material layer, a dielectric hard mask layer, and a metallic hard mask layer; patterning said metallic hard mask layer to provide metallic hard mask portions on said dielectric hard mask layer, wherein adjacent metallic hard mask portions are spaced apart by a first opening having a first width; reducing said first width of said first opening to provide a second opening having a second width; and extending said second opening having said second width entirely through said dielectric hard mask layer and at least partially through the interconnect dielectric material layer to provide an interconnect dielectric material structure having said second opening with said second width.
地址 Armonk NY US