发明名称 Forward error correction with configurable latency
摘要 A method of performing forward error correction with configurable latency, where a configurable latency algorithm evaluates a target Bit Error Rate (BER) against an actual BER and adjusts the size of a configurable buffer such that the target BER may be achieved when utilizing the smallest buffer size possible. When errors are corrected without the utilization of each of the configurable buffer locations, the algorithm reduces the size of the buffer by y buffer locations; the algorithm may continue to successively reduce the size of said buffer until the minimum number of buffer locations are utilized to achieve the target BER. If the buffer locations have been reduced such that the buffer size is too small and the target BER cannot be achieved, the algorithm may increase the size of the buffer until the minimum number of buffer locations are utilized to achieve the target BER.
申请公布号 US9063872(B2) 申请公布日期 2015.06.23
申请号 US201314139402 申请日期 2013.12.23
申请人 Altera Canada Co. 发明人 Haas Wally;Rumbolt Chuck
分类号 H03M13/03;G06F11/10;H03M13/15;H03M13/37;G06F11/07;H03M13/00 主分类号 H03M13/03
代理机构 Ropes & Gray LLP 代理人 Ropes & Gray LLP
主权项 1. A method for forward error correction using a configurable buffer, the method comprising: storing data associated with a target bit error rate in a number of locations of the configurable buffer; and reducing the number of locations of the configurable buffer for storing the data if a bit error rate based on forward error correction of the stored data achieves the target bit error rate.
地址 Toronto, Ontario CA