| 摘要 |
The present invention provides a scan driver which comprises a level shifter for outputting start signals, clock signals, and a reset signal, and a shift register composed of stages for outputting a scan signal by shifting, in response to the start signals, clock signals, and reset signals. The N^th stage among the stages comprises: a pull up transistor which sends the N^th clock signal to an output terminal of the N^th stage corresponding to the potential of a Q node; a Q node charging/discharging unit which charges and discharges the Q node; and a riffle removal unit which removes the riffle generated from an output terminal of the N^th stage by using the potential of a Q node and a N^th clock signal, which is the clock signal of its own. |
