发明名称 Multiprocessor system, multiprocessor control method, and multiprocessor integrated circuit
摘要 In a multiprocessor system, in general, a processor assigned with a larger amount of tasks is apt to perform a larger amount of communication with other processors assigned with tasks, than a processor assigned with a smaller amount of tasks. Thus in order for each processor to be able to perform the routing process efficiently, tasks are assigned such that, when there are a first processor and a second processor, the number of processors each assigned with one or more tasks and directly connected with the second processor being smaller than the number of processors each assigned with one or more tasks and directly connected with the first processor, the amount of tasks assigned to the first processor is equal to or larger than the amount of tasks assigned to the second processor.
申请公布号 US9032407(B2) 申请公布日期 2015.05.12
申请号 US201013002832 申请日期 2010.05.20
申请人 Panasonic Intellectual Property Corporation of America 发明人 Saito Masahiko
分类号 G06F15/76;G06F15/00;G06F9/46;G06F9/50 主分类号 G06F15/76
代理机构 Wenderoth, Lind & Ponack, L.L.P. 代理人 Wenderoth, Lind & Ponack, L.L.P.
主权项 1. A multiprocessor system comprising: a processor array composed of three or more processors that are arranged in a matrix and communicating with each other, wherein each pair of adjacent processors in the matrix are connected to each other such that the adjacent processors can communicate with each other without performing a routing process for any other processors in the matrix, and each respective processor of the three or more processors in the matrix is connected to a processor that is not adjacent to the respective processor such that the respective processor and the processor that is not adjacent to the respective processor can communicate with each other by performing a routing process for at least one of the processors that are adjacent to the respective processor; and a task management unit operable to select three or more of said processors of the processor array as respective three or more task-assigned processors for processing a group of tasks, and determine an amount of tasks to be assigned to each of the said task-assigned processors based on a number of processors adjacent in the matrix to that task-assigned processor, wherein the three or more task-assigned processors includes a first task-assigned processor and a second task-assigned processor, the task management unit determines the amount of tasks to be assigned to each of said task-assigned processors based on a number of adjacent task-assigned processors in the matrix to the respective said task-assigned processors, wherein an amount of tasks assigned to the first task-assigned processor is larger than an amount of tasks assigned to the second task-assigned processor when a number of task-assigned processors adjacent in the matrix to the first task-assigned processor is greater than a number of task-assigned processors adjacent in the matrix to the second task-assigned processor, and the task management unit assigns tasks to each of said task-assigned processors according to the determining.
地址 Torrance CA US