发明名称 |
Heterostructure Power Transistor with AlSiN Passivation Layer |
摘要 |
A heterostructure semiconductor device includes a first active layer and a second active layer disposed on the first active layer. A two-dimensional electron gas layer is formed between the first and second active layers. An AlSiN passivation layer is disposed on the second active layer. First and second ohmic contacts electrically connect to the second active layer. The first and second ohmic contacts are laterally spaced-apart, with a gate being disposed between the first and second ohmic contacts. |
申请公布号 |
US2015076510(A1) |
申请公布日期 |
2015.03.19 |
申请号 |
US201414539086 |
申请日期 |
2014.11.12 |
申请人 |
Power Integrations, Inc. |
发明人 |
Ramdani Jamal;Murphy Michael;Edwards John Paul |
分类号 |
H01L29/778;H01L29/20;H01L21/02;H01L29/205;H01L29/51;H01L29/423;H01L29/66;H01L29/201 |
主分类号 |
H01L29/778 |
代理机构 |
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代理人 |
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主权项 |
1. A heterostructure power transistor comprising:
a first active layer; a second active layer disposed above the first active layer, a two-dimensional electron gas layer forming between the first and second active layers; a passivation/gate dielectric layer comprising aluminum silicon nitride (AlSiN) disposed above the second active layer; a gate; and first and second ohmic contacts that electrically connect to the second active layer, the first and second ohmic contacts being laterally spaced-apart, the gate being disposed between the first and second ohmic contacts. |
地址 |
San Jose CA US |