发明名称 Memory device and method of manufacturing memory device
摘要 According to one embodiment, a memory device includes a first conductive line extending in a first direction, second conductive lines each extending in a second direction intersect with the first direction, a third conductive line extending in a third direction intersect with the first and second directions, an insulating layer disposed between the second conductive lines and the third conductive line, resistance change elements each disposed on one of first and second surfaces of each of the second conductive lines in the third direction, and each connected to the third conductive line, a semiconductor layer connected between the first conductive line and one end of the third conductive line, and a select FET having a select gate electrode, and using the semiconductor layer as a channel.
申请公布号 US8963115(B2) 申请公布日期 2015.02.24
申请号 US201314017703 申请日期 2013.09.04
申请人 Kabushiki Kaisha Toshiba 发明人 Murooka Kenichi
分类号 H01L27/24;H01L45/00;G11C13/00 主分类号 H01L27/24
代理机构 Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P. 代理人 Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
主权项 1. A memory device comprising: a first conductive line extending in a first direction; second conductive lines each extending in a second direction which intersects with the first direction; a third conductive line extending along in a third directions which is substantially perpendicular to the first and second directions, and one end of the third conductive line connecting to the first conductive line; an insulating layer disposed between the second conductive lines and the third conductive line; and resistance change elements each disposed on one of first and second surfaces of each of the second conductive lines perpendicular to the third direction, and each connected to the third conductive line.
地址 Minato-ku JP