发明名称 MEMORY CIRCUIT AND CONTROL METHOD OF MEMORY CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To suppress malfunction.SOLUTION: A simultaneous selection detection circuit 22 outputs a selection detection signal according to a result of detection as to whether or not word lines on the same row have been simultaneously selected on the basis of potentials of word lines AW0 to AW3 and BW0 to BW3. While the word lines on the same row are selected, sense amplifiers BSA0 to BSA3 of bit lines in a B port, which are connected with memory cells of a bit line pair driven by a light amplifier AWA in an A port, are stopped by sense amplifier control signals generated by light operation detection circuits AWD0 to AWD3 detecting the light operation of the A port.</p>
申请公布号 JP2015036997(A) 申请公布日期 2015.02.23
申请号 JP20130168156 申请日期 2013.08.13
申请人 FUJITSU SEMICONDUCTOR LTD 发明人 MUKAI MASAMICHI
分类号 G11C11/413 主分类号 G11C11/413
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