发明名称 INFORMATION PROCESSING DEVICE AND INFORMATION PROCESSING DEVICE CONTROL METHOD
摘要 A reception circuit receives data using a plurality of lanes. When a failure occurs in one of the lanes, an all lanes control unit (505) degenerates a predetermined number of lanes including the lane in which the failure has occurred. Then, a continuously-operated lane control unit (504) causes the reception circuit to receive the data using remaining lanes except for the predetermined number of degenerated lanes among the lanes. A degenerated lane control unit (503) performs retraining to establish links in the predetermined number of lanes. When the links are established by the retraining with the degenerated lane control unit (503), an all lanes control unit (505) causes the reception circuit to receive the data using the predetermined number of lanes and the remaining lanes.
申请公布号 EP2833593(A1) 申请公布日期 2015.02.04
申请号 EP20120872821 申请日期 2012.03.29
申请人 FUJITSU LIMITED 发明人 MAEDA, KOICHI;HAYASAKA, KAZUMI
分类号 H04L29/04;G06F11/22;H04L29/00;H04L29/08;H04L29/14 主分类号 H04L29/04
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