发明名称 |
INTEGRATED CIRCUIT COMPRISING TEST CIRCUITRY FOR TESTING FAN-OUT PATHS OF A TEST CONTROL PRIMARY INPUT |
摘要 |
An integrated circuit comprises a primary input adapted to receive a test control signal, a primary output, and logic circuits having inputs coupled to the primary input via respective fan-out paths of the primary input. The integrated circuit further includes first test circuitry configured for testing a designated portion of the integrated circuit in a first test mode of operation with the test control signal at a first logic value, and second test circuitry coupled between the inputs of the logic circuits and the primary output and configured for testing of the fan-out paths in a second test mode of operation in which the test control signal takes on both the first logic value and a second logic value associated with a functional mode of operation. The primary input, primary output, logic circuits and test circuitry may be associated with a particular circuit core of the integrated circuit. |
申请公布号 |
US2014365838(A1) |
申请公布日期 |
2014.12.11 |
申请号 |
US201313914753 |
申请日期 |
2013.06.11 |
申请人 |
LSI Corporation |
发明人 |
Tekumalla Ramesh C.;Sharma Vijay |
分类号 |
G01R31/3177 |
主分类号 |
G01R31/3177 |
代理机构 |
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代理人 |
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主权项 |
1. An integrated circuit comprising:
a primary input adapted to receive a test control signal; a primary output; a plurality of logic circuits having inputs coupled to the primary input via respective fan-out paths of the primary input; first test circuitry configured for testing a designated portion of the integrated circuit in a first test mode of operation with the test control signal at a first logic value; and second test circuitry coupled between the inputs of the logic circuits and the primary output and configured for testing of the fan-out paths in a second test mode of operation in which the test control signal takes on both the first logic value and a second logic value associated with a functional mode of operation. |
地址 |
San Jose CA US |