| 摘要 |
<p>The present invention relates to a MOS transistor and a method for manufacturing the same. The method for manufacturing the MOS transistor comprises the step of providing a semiconductor substrate where an active region and a shallow trench separation structure surrounding the active region are formed inside; the step of forming a gate electrode structure at the surface of the active region and forming a dummy gate electrode structure at the surface of the shallow trench separation structure; the step of forming a source region and a drain region in the active regions at the both sides of the gate electrode structure; and the step of electrically connecting the source and drain regions to the dummy gate electrode structure by forming an interconnection layer at the surface of the source region, the surface of the drain region, at least a part of upper surface of the dummy gate electrode structure. The exposed widths of the source and drain regions can be relatively narrow since a conductive plug is not directly formed at the surface of the source and drain regions. The integration ratio of a chip can be enhanced by reducing a chip space occupied by the MOS transistor since the dummy gate structure is positioned at the surface of the shallow trench separation structure for not occupying additional chip spaces.</p> |
