<p>A method and a device for correcting a duty cycle error of a clock signal are suggested. The method may be implemented using a programmable charge pump and/or a programmable buffer chain along with control device to provide output duty cycle of 50% for wide operating frequency and input duty cycle range. Where the programmable charge pump is an electronic device with programmable current sources; adjusting the sizes of current source devices is controlled by digitally decoded bits. Digitally decoded bits may be generated by converting the output of programmable charge pump to digital bits using an electronic device ADC and decoding the output of ADC using a combinational device. Where the programmable buffer chain is an electronic device using programmable inverters connected in series; adjusting the sizes of inverters is controlled by information bit carrying the information of operating frequency region. Where the information bit may be generated internally in the same device or can be generated from different electronic device. The information bit may also be used in combinational device for different operating frequency range.</p>
