发明名称 USB ISOLATOR INTEGRATED CIRCUIT WITH USB 2.0 HIGH SPEED MODE AND AUTOMATIC SPEED DETECTION
摘要 A USB isolator integrated circuit, including: an isolation barrier disposed between an upstream portion and a downstream portion of the integrated circuit to provide galvanic isolation therebetween;a first USB 2.0 interface configured to receive and transmit USB 2.0 compliant signals between the upstream portion of the integrated circuit and an upstream USB entity;a second USB 2.0 interface configured to receive and transmit USB 2.0 compliant signals between the downstream portion of the integrated circuit and a downstream USB entity;a plurality of signal coupling components configured to allow communication between the upstream portion and the downstream portion of the integrated circuit to allow the upstream USB entity and the downstream USB entity to communicate therebetween using a USB 2.0 protocol while maintaining the galvanic isolation therebetween; and the upstream and downstream portions of the integrated circuit including respective modules configured to automatically detect a USB 2.0 speed of the upstream or downstream USB entities and responsive to said detection to automatically put the integrated circuit into a corresponding one of a plurality of USB 2.0 speed modes for communication between the upstream and downstream USB entities, the plurality of USB 2.0 speed modes including a USB low-speed mode, a USB full-speed mode, and a USB 2.0 high-speed mode.
申请公布号 US2014211862(A1) 申请公布日期 2014.07.31
申请号 US201214119855 申请日期 2012.05.25
申请人 The Silanna Group Pty Ltd 发明人 Moghe Yashodhan Vijay;Brinkhoff James
分类号 H04B5/00 主分类号 H04B5/00
代理机构 代理人
主权项 1. A USB isolator integrated circuit, including: an isolation barrier disposed between an upstream portion and a downstream portion of the integrated circuit to provide galvanic isolation therebetween; a first USB 2.0 interface configured to receive and transmit USB 2.0 compliant signals between the upstream portion of the integrated circuit and an upstream USB entity; a second USB 2.0 interface configured to receive and transmit USB 2.0 compliant signals between the downstream portion of the integrated circuit and a downstream USB entity; a plurality of signal coupling components configured to allow communication between the upstream portion and the downstream portion of the integrated circuit to allow the upstream USB entity and the downstream USB entity to communicate therebetween using a USB 2.0 protocol while maintaining the galvanic isolation therebetween; and the upstream and downstream portions of the integrated circuit including respective modules configured to automatically detect a USB 2.0 speed of the upstream or downstream USB entities and responsive to said detection to automatically put the integrated circuit into a corresponding one of a plurality of USB 2.0 speed modes for communication between the upstream and downstream USB entities, the plurality of USB 2.0 speed modes including a USB low-speed mode, a USB full-speed mode, and a USB 2.0 high-speed mode.
地址 Eight Mile Plains, Queensland AU