Bipolar stacked transistor architecture

摘要

An amplifier for an integrated circuit has a plurality of ratioed current mirrors connected to each other in a stacked configuration. Each ratio mirror has at least two resistors and at least two bipolar transistors connected to each other via said at least two resistors. Each amplifying transistor, contains a capacitor, and potentially and inductor, to internally match the transistors that make up the amplifying stack. DC, harmonic and s-parameter simulations are performed to provide an optimal impedance for each of the stacked transistors to maximize the RF power output of each stacked layer and the amplifier.

主权项

1. An amplifier comprising:
a plurality of ratioed current mirrors connected to each other, each ratio mirror having at least two resistors, a first bipolar transistor and a second bipolar transistor connected to the first bipolar transistor via said at least two resistors, wherein the first bipolar transistor of one of the plurality of ratioed current mirrors sets the DC bias for the second bipolar transistor of said one of the plurality of ratioed current mirrors which provides RF amplification at a set DC bias level, and wherein said first transistors of the plurality of current mirrors form a stacked configuration having an output, and said second transistors of the plurality of current mirrors have a DC biasing input; and a feedback pathway connecting the output of the stacked configuration with the DC biasing input, wherein said feedback pathway provides negative RF feedback and variable dc bias control.