发明名称 |
Methods for fabricating a cell string and a non-volatile memory device including the cell string |
摘要 |
A method for fabricating a cell string includes forming an interlayer dielectric layer, a sacrificial layer, and a semiconductor pattern on a semiconductor substrate, such that the interlayer dielectric layer and the sacrificial layer are formed in a first direction parallel with the semiconductor substrate, and such that the semiconductor pattern is formed in a second direction perpendicular to the semiconductor substrate, forming an opening by patterning the interlayer dielectric layer and the sacrificial layer, filling the opening with a metal, and annealing the semiconductor pattern having the opening filled with the metal. |
申请公布号 |
US8785276(B2) |
申请公布日期 |
2014.07.22 |
申请号 |
US201113198143 |
申请日期 |
2011.08.04 |
申请人 |
Samsung Electronics Co., Ltd. |
发明人 |
Nakanishi Toshiro;Lee Choong-Man |
分类号 |
H01L21/336;H01L21/4763;H01L29/792;H01L29/76 |
主分类号 |
H01L21/336 |
代理机构 |
Lee & Morse, P.C. |
代理人 |
Lee & Morse, P.C. |
主权项 |
1. A method for fabricating a cell string, the method comprising:
forming an interlayer dielectric layer, a sacrificial layer, and a semiconductor pattern on a semiconductor substrate, such that the interlayer dielectric layer and the sacrificial layer are formed in a first direction parallel with the semiconductor substrate, and such that the semiconductor pattern is formed in a second direction perpendicular to the semiconductor substrate; forming an opening by patterning the interlayer dielectric layer and the sacrificial layer; filling the opening with a metal, such that the metal contacts the sacrificial layer to form an interface between the metal and the sacrificial layer; and annealing the semiconductor pattern having the opening filled with the metal. |
地址 |
Suwon-si, Gyeonggi-do KR |