| 发明名称 |
SHARED ERROR PROTECTION FOR REGISTER BANKS |
| 摘要 |
A method for adding error detection, or error detection combined with error correction, to a plurality of register banks includes grouping the plurality of register banks into an array. The method also includes adding a first error control mechanism to the array in a first direction and adding a second error control mechanism to the array in a second direction. The method further includes adding a product code to the array, the product code including applying the second error control mechanism to a plurality of bits of the first error control mechanism. |
| 申请公布号 |
US2014201589(A1) |
申请公布日期 |
2014.07.17 |
| 申请号 |
US201313741602 |
申请日期 |
2013.01.15 |
| 申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
Huott William V.;Kark Kevin W.;Massey John G.;Muller K. Paul;Rude David L.;Wolpert David S. |
| 分类号 |
H03M13/29 |
主分类号 |
H03M13/29 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A method for adding error detection, or error detection combined with error correction, to a plurality of register banks comprising:
grouping the plurality of register banks into an array; adding a first error control mechanism to the array in a first direction; adding a second error control mechanism to the array in a second direction; and adding a product code to the array, wherein the product code comprises applying the second error control mechanism to a plurality of bits of the first error control mechanism. |
| 地址 |
Armonk NY US |
