Tri-state driver circuits having automatic high-impedance enabling

摘要

Memories, driver circuits, and methods for generating an output signal in response to an input signal. One such driver circuit includes an input stage and an output stage. The input stage receives the input signal and provides a delayed input signal having a delay relative to the input signal. The output stage receives the delayed input signal and further receives the complement of the input signal. The output stage couples an output node to a first voltage in response to a complement of the input signal having a first logic level and couples the output to a second voltage in response to the complement of the input signal having a second logic level. The output stage further decouples the output from the first or second voltage in response to receiving the delayed input signal to provide a high-impedance at the output node.

主权项

1. A signal driver comprising:
an input stage configured to receive an input signal and configured to provide a delayed input signal having a delay relative to the input signal; and an output stage coupled to the input stage to receive the delayed input signal and configured to receive a complement of the input signal, the output stage further configured to provide a first voltage at an output in response to the complement of the input signal transitioning from a first logic level to a second logic level and to provide a second voltage at the output in response to the complement of the input signal transitioning from the second logic level to the first logic level, the output stage further configured to place the output in a tri-state condition in response to receiving the delayed input signal and wherein the second voltage at the output is maintained by a current source responsive to the tri-state condition of the output; wherein the output stage does not comprise a latch.