SEMICONDUCTOR MEMORY DEVICES AND METHODS OF TESTING OPEN FAILURES THEREOF

摘要

Semiconductor memory devices are provided. The semiconductor memory device includes an input/output (I/O) drive controller, a data I/O unit and a data transmitter. The data I/O unit selectively drives a first global I/O line and first/second global I/O lines according to the first or second test modes. The data transmitter selectively transfers the data on the first global I/O line onto first and second local I/O lines to store the data on the first global I/O line, and the data on the first and second global I/O lines onto the first and second local I/O lines according to the first or second test modes.

主权项

1. A semiconductor memory device comprising:
an input/output (I/O) drive controller configured to generate drive control signals and an input control signal for controlling first and second global I/O lines according to a first test mode or a second test mode; a data I/O unit configured to drive the first global I/O line in response to an input data when a write operation is executed in the first test mode, and to drive the first and second global I/O lines in response to the drive control signals when the write operation is executed in the second test mode; and a data transmitter configured to transfer data loaded on the first global I/O line onto first and second local I/O lines to store the data on the first global I/O line in a memory cell array portion when the write operation is executed in the first test mode, and configured to transfer data loaded on the first and second global I/O lines onto the first and second local I/O lines to store the data on the first and second global I/O lines in the memory cell array portion when the write operation is executed in the second test mode.