| 摘要 |
PROBLEM TO BE SOLVED: To provide a memory access controller for improving system performance by suppressing an occurrence of thrashing and improving a hit ratio of a cache memory.SOLUTION: The memory access controller of this invention includes: a first associative storage device and a second associative storage device for storing a copy of data stored in a main storage in association with the address of the main storage, and outputting data associated with an address coincident with an inputted address; and access control means for inputting an address included in a data reference instruction from an instruction issuing part of a central processing unit, and outputting the address to the first associative storage device and the second associative storage device in parallel. The number of entries for storing one piece of data is smaller in the first associative storage device than in the second associative storage device, and the degree of association being the number of entries having the possibility of storing one piece of data is larger in the first associative storage device than in the second associative storage device. |
