REDUCING THE EFFECT OF ELEMENTS MISMATCH IN AN SAR ADC

摘要

In one aspect, an intermediate set of bits of an SAR ADC is converted into a first intermediate analog value and a second intermediate analog value respectively from a first set of representative capacitors and a second set of representative capacitors. At least one capacitor in the first and second sets are selected as not same. An SAR ADC output code is generated from the first and second intermediate analog values. In another aspect, resolution of an N-bit SAR ADC is enhanced by generating a plurality of N-bit digital codes correspondingly operating the N-Bit SARADC with more than one transfer function. Each transfer function is selected such that it is offset by a fraction of a least significant bit (LSB) value. The multiple N-bit digital codes are then added to form a P-bit digital code such that P is greater than N due to addition.