发明名称 Flash memory cell on SeOI having a second control gate buried under the insulating layer
摘要 The invention relates to a flash memory cell having a FET transistor with a floating gate on a semiconductor-on-insulator (SOI) substrate composed of a thin film of semiconductor material separated from a base substrate by an insulating buried oxide (BOX) layer, The transistor has in the thin film, a channel, with two control gates, a front control gate located above the floating gate and separated from it by an inter-gate dielectric, and a back control gate located within the base substrate directly under the insulating (BOX) layer and separated from the channel by only the insulating (BOX) layer. The two control gates are designed to be used in combination to perform a cell programming operation. The invention also relates to a memory array made up of a plurality of memory cells according to the first aspect of the invention, which can be in an array of rows and columns, and a method of fabricating such memory cells and memory arrays.
申请公布号 US8664712(B2) 申请公布日期 2014.03.04
申请号 US20100946135 申请日期 2010.11.15
申请人 MAZURE CARLOS;FERRANT RICHARD;SOITEC 发明人 MAZURE CARLOS;FERRANT RICHARD
分类号 H01L29/66;H01L21/3205;H01L21/336;H01L21/4763;H01L27/12;H01L29/788 主分类号 H01L29/66
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